Field-effect transistor

作者: Charvaka Duvvury

DOI:

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摘要: A field-effect transistor (10, FIG. 2) possesses improved electrostatic discharge characteristics. The (10), formed in a p-type semiconductor substrate, comprises gate (16) that forms channel between two adjacent n-regions (12 and 14). At least one of the (12) has an n-well (22) below centered about contact pad (18). second lower concentration n-type impurities than either n-regions.

参考文章(17)
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O Sgs-Thomson Microelectronics Han, Tsiu Chiu C, O Sgs-Thomson Microelectronics Chan, Yu-Pin C, Method for forming a self-aligned source/drain contact for a MOS transistor ,(1989)
Leonardus J. Van Roozendaal, Rene G. M. Penning De Vries, ESD protection element for CMOS integrated circuit ,(1992)
James D. Gallia, David B. Scott, Patrick W. Bosshart, Circuit to improve electrostatic discharge protection ,(1987)