A Highly Selective, Very Linear Low Noise Transconductance Amplifier Capable of Large-Signal Handling for Current-Mode Receivers Front-End

摘要: The staggering advances in mobile phone industry and wireless technologies have led to abundance of cellular standards over the past few years. Most emerging radio (such as 4G LTE WiMax) require flexible RF transceivers capable handling various bandwidths modulation scheme. Meanwhile, demand by manufacturers for miniaturization, power cost reduction compelled further integration juxtaposing multiple SoC cores on a single silicon die. prominent challenge multi-radio chips is blocker interference. Blocker constraint radios very stringent, requiring external SAW filters or high performance duplexers. However, are bulky expensive; plus, they reduce receiver flexibility degrade RX sensitivity dB. To circumvent these issues, “true SAW-less” receivers (by removing filter at input RX) been proposed literature. achieve ultimate multi-core operation, wide-band front-ends robust against interference, excess requirements usually specified standard, required. In this work, highly selective, linear LNTA large-signal current-mode implemented 65-nm CMOS technology. It shown that combining on-chip high-Q bandpass with push/pull class-AB common-gate stage, large desensitization point (B1dB) IIP3 +8 dBm +20 dBm, respectively, can be achieved, 1.5 V supply voltages 7.5 mA current consumption. applying noise cancellation technique, via an auxiliary common-source moderate NF 5.9 dB possible, which competitive number such value B1dB.