Dielectric isolated integrated circuit substrate processes

摘要: Dielectric isolation has proven effective in raising inter-device breakdown voltages, lowering parasitic capacitances, and increasing resistance to radiation damage. The fabrication of a dielectric-isolated substrate, prior diffusions, requires adequate control the thickness epitaxial layer, crowning warpage, necessarily smooth, damage-free surface. mere juxtaposition three or more layers different materials, even before diffusion-induced strains, creates special problems because coefficient-of-expansion mismatches. In addition, substrates must pass through subsequent diffusion cycles permit transistors with characteristics as good (or better than) those made on p-n junction isolated substrates. There are major methods using silicon dioxide dielectric separate active areas an integrated circuit: 1) shape-back channels wafer which had etched out filled polycrystalline silicon; 2) etch fill single crystal n+wafer already moats created; 3) growth etching isolating channels. This paper describes compares these methods.