Control processor for controlling a peripheral unit

作者: Keiji Matsumoto , Kazuya Yonezu

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摘要: A peripheral control processor for controlling data communication between a host and unit in response to command signals applied the processor. The has an idle time or standby condition when is not required. When condition, circuit, within inhibits clock signal which activates transistor elements of internal circuit Therefore, unnecessary power comsumption reduced during condition. Further, can produce inhibition by using used communication. no new terminals are required applying input circuit.

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