Architecture and method for testing VLSI processors
作者： Satish M. Thatte , Theo J. Powell , Thirumalai Sridhar , Han-Tzong Yuan , David S. Ho
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摘要: A method and apparatus for testing VLSI processors using a bit-sliced bus-oriented data path include control monitors BIT the on-chip memory. The monitor is used to compress output produced by path. implementation of functional test coupled with are an off-line self-test in field. decouple task section from that
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