UPIM: Unipolar Switching Logic for High Density Processing-in-Memory Applications

作者: Joonseop Sim , Saransh Gupta , Mohsen Imani , Yeseong Kim , Tajana Rosing

DOI: 10.1145/3299874.3318011

关键词:

摘要: Internet of Things (IoT) has built a network with billions connected devices which generate massive volumes data. Processing large data on existing systems requires significant costs for movements between processors and memory due to limited cache capacity bandwidth. Processing-In-Memory (PIM) is promising solution address the issue. Prior techniques that enable computation in non-volatile (NVM) are designed bipolar switching mode, suffers from high sneak current crossbar array (CBA) structure. In this paper, we propose unipolar-switching logic high-density PIM applications, called UPIM. Our design exploits mode memristor can be operated 1D1R structure hence suppresses exists prior technologies. Moreover, UPIM takes advantages 3D vertical increase utilization per unit area applications. evaluation wide range applications shows achieves up 31.3× energy saving 113.8× energy-delay product (EDP) improvement as compared recent GPGPU architecture. As state-of-the-art based our 3.1× lower consumption.

参考文章(24)
Shahar Kvatinsky, Misbah Ramadan, Eby G. Friedman, Avinoam Kolodny, VTEAM: A General Model for Voltage-Controlled Memristors IEEE Transactions on Circuits and Systems Ii-express Briefs. ,vol. 62, pp. 786- 790 ,(2015) , 10.1109/TCSII.2015.2433536
Jun Yeong Seok, Seul Ji Song, Jung Ho Yoon, Kyung Jean Yoon, Tae Hyung Park, Dae Eun Kwon, Hyungkwang Lim, Gun Hwan Kim, Doo Seok Jeong, Cheol Seong Hwang, A Review of Three‐Dimensional Resistive Switching Cross‐Bar Array Memories from the Integration and Materials Property Points of View Advanced Functional Materials. ,vol. 24, pp. 5316- 5339 ,(2014) , 10.1002/ADFM.201303520
Meikei Ieong, Bruce Doris, Jakub Kedzierski, Ken Rim, Min Yang, Silicon device scaling to the sub-10-nm regime. Science. ,vol. 306, pp. 2057- 2060 ,(2004) , 10.1126/SCIENCE.1100731
Anne Siemon, Stephan Menzel, Rainer Waser, Eike Linn, A Complementary Resistive Switch-Based Crossbar Array Adder IEEE Journal on Emerging and Selected Topics in Circuits and Systems. ,vol. 5, pp. 64- 74 ,(2015) , 10.1109/JETCAS.2015.2398217
Shahar Kvatinsky, Dmitry Belousov, Slavik Liman, Guy Satat, Nimrod Wald, Eby G. Friedman, Avinoam Kolodny, Uri C. Weiser, MAGIC—Memristor-Aided Logic IEEE Transactions on Circuits and Systems Ii-express Briefs. ,vol. 61, pp. 895- 899 ,(2014) , 10.1109/TCSII.2014.2357292
Eero Lehtonen, Mika Laiho, Stateful implication logic with memristors international symposium on nanoscale architectures. pp. 33- 36 ,(2009) , 10.1109/NANOARCH.2009.5226356
G. Dimitroulakos, M.D. Galanis, C.E. Goutis, Alleviating the data memory bandwidth bottleneck in coarse-grained reconfigurable arrays application-specific systems, architectures, and processors. pp. 161- 168 ,(2005) , 10.1109/ASAP.2005.12
Ting-Chang Chang, Kuan-Chang Chang, Tsung-Ming Tsai, Tian-Jian Chu, Simon M. Sze, Resistance random access memory Materials Today. ,vol. 19, pp. 254- 264 ,(2014) , 10.1016/J.MATTOD.2015.11.009
Shuangchen Li, Cong Xu, Qiaosha Zou, Jishen Zhao, Yu Lu, Yuan Xie, Pinatubo: a processing-in-memory architecture for bulk bitwise operations in emerging non-volatile memories design automation conference. pp. 173- ,(2016) , 10.1145/2897937.2898064
Nishil Talati, Saransh Gupta, Pravin Mane, Shahar Kvatinsky, Logic Design Within Memristive Memories Using Memristor-Aided loGIC (MAGIC) IEEE Transactions on Nanotechnology. ,vol. 15, pp. 635- 650 ,(2016) , 10.1109/TNANO.2016.2570248