Microcomputerized electronic postage meter system

作者: Joseph R. Warren , Frank T. Check , Alton B. Eckert

DOI:

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摘要: An advanced electronic postage meter system is described, which built around a micro computer set. The set of LSI design, and comprises single chip central processor unit (CPU) performs all control data processing functions. Auxiliary to the CPU are ROM's store program system; RAM's provide with working memory; Shift Registers expand I/O capacity multiplexing capability. componentry such as non-volatile memory for accounting purposes; display visually monitoring functions keyboard instructing modified motorized setting means printing upon pieces mail. These peripheral devices communicate through ports, provided port capabilities these devices.

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