System-level modeling and refinement of a canny edge detector

摘要: Electronic System Level design methodology and supporting tools simplifies the design of complex embedded systems. In this paper, a case study with an application example of canny edge detector is presented. We recoded a C reference code of canny to an initial specification model in SpecC. In order to yield best design from automated system level design tools, we refined the specification model by exploiting data-level parallelism, pipelining and converting floating-point computation to fixed-point in the initial model. With the optimized specification model, we used System-on-Chip Environment (SCE) to explore the design space, find allocation and mapping scheme which can achieve real-time computing, and refinement the specification model to Transaction level Model.