ESD structure having an improved noise immunity in CMOS and BICMOS semiconductor devices

作者: Mark W Rouse , Andrew Walker , Brenor Brophy , Kenelm Murray

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摘要: (21) Appl. No.: 09/058,549(57) ABSTRACT (22) Filed: Apr. 10, 1998 A Semiconductor device includes a grounded-gate n-channel 7 field effect transistor (FET) between an I/O pad and ground (51) Int. Cl........................ H01L 29/72; H01L 31/119;(V) and/or V. for providing ESD protection. The FET H01L 31/113; H01L 29/76 includes a tap region of grounded p-type Semiconductor

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