引用次数
引用: 619
H-指数: 9
I10-指数 : 6
出版物: 78
Using MARTE in the MOPCOM SoC/SoPC Methodology
Ali Koudri , Joël Champeau , Didier Vojtsiek , Jean-Christophe Le Lann
Workshop MARTE, Colocated with DATE
12
2008
Communication-aware Parallelization Strategies for High Performance Applications (Invited Paper)
Nader Khammassi , Jean-Christophe Le Lann , Koen Bertels , Imran Ashraf
2015
XPU: A C++ Metaprogramming Approach to Ease Parallelism Expression: Parallelization Methodology, Internal Design and Practical Application
Nader Khammassi , Jean-Christophe Le Lann
NOVA publishers 175 -198
2014
Tackling Real-Time Signal Processing Applications on Shared Memory Multicore Architectures Using XPU
Nader Khammassi , Jean-Christophe Le Lann
ERTS 2014
2
2014
A High-Level Programming Model to Ease Pipeline Parallelism Expression On Shared Memory Multicore Architectures
Nader Khammassi , Jean-Christophe Le Lann
HPC 2014
2014
PROCEDE ET DISPOSITIF DE DECODAGE ARITHMETIQUE
Le Lann Jean Christophe , Jollivet Christophe , Cocherel Gildas , Fossard Michael
2
2007
Towards a Hardware DSL Ecosystem : RubyRTL and Friends.
Jean-Christophe Le Lann , Florent Kermarrec , Hannah Badier
arXiv: Hardware Architecture
2020
LiteX: an open-source SoC builder and library based on Migen Python DSL.
Hannah Badier , Sébastien Bourdeauducq , Jean-Christophe Le Lann , Florent Kermarrec
arXiv: Hardware Architecture
20
2020
POLYCHRONY FOR SYSTEM DESIGN
Paul Le Guernic , Jean-Pierre Talpin , Jean-Christophe Le Lann
Journal of Circuits, Systems, and Computers 12 ( 03) 261 -303
213
2003
Model-driven toolset for embedded reconfigurable cores
Loïc Lagadec , Ciprian Teodorov , Jean-Christophe Le Lann , Damien Picard
Science of Computer Programming 96 156 -174
5
2014
Demo: Overlay architectures for heterogeneous FPGA cluster management
Theotime Bollengier , Mohamad Najem , Jean-Christophe Le Lann , Loic Lagadec
conference on design and architectures for signal and image processing 239 -240
2
2016
Soft Timing Closure for Soft Programmable Logic Cores: The ARGen Approach
Théotime Bollengier , Loïc Lagadec , Mohamad Najem , Jean-Christophe Le Lann
Lecture Notes in Computer Science 93 -105
3
2017
DESIGN AND IMPLEMENTATION OF A CACHE HIERARCHY -AWARE TASK SCHEDULING FOR PARALLEL LOOPS ON MULTICORE ARCHITECTURES
Nader Khammassi , Jean-Christophe Le Lann
international conference on computer science and information technology 427 -439
3
2014
Simulation et synthèse de circuits s'appuyant sur le modèle synchrone
Jean-Christophe Le Lann
Rennes 1
1
2002
A new type of intervals for solving problems involving partially defined functions
Pierre Filiol , Théotime Bollgenier , Luc Jaulin , Jean-Christophe Le Lann
Gottfried Wilhelm Leibniz Universität Hannover
2022
Demo Night
Fernando Herrera , Héctor Posadas , Pablo Peñil , Eugenio Villar
FPGAs (ReConFig) Additional Reviewers
Karan Sapra , Naif Tarafdar , Christian Weis , Fernando Martin Del
Acher, Mathieu 3 Albert, Patrick 173 Al-Hilank, Samir 116 Atkinson, Colin
Tomas Balderas-Contreras , Jean Bezivin , Arbi Bouchoucha , Mounir Boukadoum
Modelling Foundations and Applications: 6th European Conference, ECMFA 2010, Paris, France, June 15-18, 2010, Proceedings 6138 355 -355
2010
An experimental toolchain based on high-level dataflow models of computation for hetereogenous MPSoC
Julien Heulot , Karol Desnos , Jean François Nezan , Maxime Pelcat
Design and Architectures for Signal and Image Processing (DASIP)
5
2012
An experimental toolchain based on high-level dataflow models of computation for heterogeneous MPSoC
M. Pelcat , K. Desnos , J.-F. Nezan , M. Raulet
conference on design and architectures for signal and image processing 1 -2
2
2012
Théotime Bollengier Mohamad Najem ali koudri Nader Khammassi Christophe Moy Abdel-Ouahab Boudraa Guy GOGNIAT Luc Fabresse Jannik Laval Koen Bertels Pr. Noury Bouraqadi Ciprian Teodorov Mickaël Raulet Jean- Francois Nezan Seznec Andre Karol DESNOS Julien Heulot maxime pelcat Muhammad Rashid Alain Plantec