Sisir Kumar Jena
机构: PhD CSE, IIT Guwahati, Staff Engg. R&D at Synopsys
每年引用次数
引用次数
引用: 33
H-指数: 4
I10-指数 : 0
出版物: 11
Systematic Design of Approximate Adder Using Significance Based Gate-Level Pruning (SGLP) for Image Processing Application
Sisir Kumar Jena , Santosh Biswas , Jatindra Kumar Deka
pattern recognition and machine intelligence 561 -570
1
2019
Maximizing Yield through Retesting of Rejected Circuits using Approximation Technique
Sisir Kumar Jena , Santosh Biswas , Jatindra Kumar Deka
ieee region 10 conference 182 -187
2020
Approximate Testing of Digital VLSI Circuits using Error Significance based Fault Analysis
Sisir Kumar Jena , Santosh Biswas , Jatindra Kumar Deka
vlsi design and test 1 -6
2020
Approximate function memoization
Priya Arundhati , Sisir Kumar Jena , Santosh Kumar Pani
Concurrency and Computation: Practice and Experience 34 ( 23) e7204 -e7204
1
2022
Retesting defective circuits to allow acceptable faults for yield enhancement
Sisir Kumar Jena , Santosh Biswas , Jatindra Kumar Deka
Journal of Electronic Testing 37 ( 5) 633 -652
4
2021
A robust approach for digital watermarking of satellite imagery dataset
Arshad Husain , Aditya Dev Mishra , Sisir Kumar Jena
International Journal of Swarm Intelligence 7 ( 1) 82 -93
2022
Analysis and Redesign of Digital Circuits to Support Green Computing Through Approximation
Sisir Kumar Jena , Saurabh Kumar Srivastava , Arshad Husain
Proceedings of the International Conference on Paradigms of Computing, Communication and Data Sciences: PCCDS 2020 137 -147
2021
Component Interaction Graph: A new approach to test component composition
Arup Abhinna Acharya , Sisir Kumar Jena
arXiv preprint arXiv:1006.2812
9
2010
Fault Classification Based Approximate Testing of Digital VLSI Circuit
Sisir Kumar Jena
Electronic Systems and Intelligent Computing: Proceedings of ESIC 2020 641 -651
1
2020
C Programming: Learn to Code
Sisir Kumar Jena
Chapman and Hall/CRC
2021
Design and Testing of Digital VLSI Circuits using Approximate Computing
Sisir Kumar Jena
Guwahati