Block read count voltage adjustment

作者: Kishore Kumar Muchherla , Sampath Ratnam , Gary F. Besinga , Ashutosh Malshe , Michael G. Miller

DOI:

关键词: VoltageBlock (data storage)Electrical engineeringCell basedValue (computer science)NAND gateComputer science

摘要: Disclosed in some examples, are methods, systems, and machine readable mediums which compensate for read-disturb effects by shifting the read voltages used to value a NAND cell based upon counter. For example, memory device may have counter that corresponds group of cells (e.g., page, block, superblock). Anytime is read, be incremented. The voltage, Vread, adjusted on account disturb voltage.

参考文章(61)
Jungho Yun, Wonchul Lee, Dawoon Jung, Youngil Seo, Memory system and related block management method ,(2013)
Hong Rak Son, Kwanghoon Kim, Changkyu Seol, Jun Jin Kong, Semiconductor memory systems using regression analysis and read methods thereof ,(2013)
Yen-Hao Shih, Hsiang-Lan Lung, Hang-Ting Lue, Ming Hsiu Lee, Erh-Kun Lai, 3d memory array arranged for fn tunneling program and erase ,(2010)
Idan Alrod, Eran Sharon, Evgeny Mekhanik, Updating read voltages ,(2014)
Barry Cushing Stipe, Ultra low-cost solid-state memory ,(2004)
Peter Feeley, Zhenlei Shen, William H. Radke, Methods, devices, and systems for adjusting sensing voltages in devices ,(2012)