Structure and manufacturing method of a chip scale package with low fabrication cost, fine pitch and high reliability solder bump
作者： Chuen-Jye Lin , Ming-Ta Lei , Mou-Shiung Lin
DOI:
关键词: Semiconductor device 、 Interconnection 、 Chip-scale package 、 Electronic engineering 、 Soldering 、 Flip chip 、 Thermal copper pillar bump 、 Optoelectronics 、 Fabrication 、 Materials science 、 Reliability (semiconductor)
摘要: A new method and package is provided for the mounting of semiconductor devices that have been with small-pitch Input/Output interconnect bumps. Fine pitch solder bumps, consisting pillar metal a bump, are applied directly to I/O pads device, device then flip-chip bonded substrate. Dummy bumps may be cases where arranged such additional mechanical support required.
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