3d memory having vertical switches with surround gates and method thereof
作者： Raul-Adrian Cernea , Yung-Tin Chen , Steven John Radigan , Roy E. Scheuerlein
DOI:
关键词: Plane (geometry) 、 3d memory 、 Line (geometry) 、 Physics 、 Optoelectronics 、 Set (abstract data type) 、 Layer (object-oriented design) 、 Transistor 、 Thin-film transistor 、 Bit line 、 Electronic engineering
摘要: A vertical switching layer of a 3D memory device serves to switch set local bit lines corresponding global lines, the being 2D array TFT channels thin-film transistors (TFTs) aligned connect an each line line. The TFTs in have separation lengths Lx and Ly along x- y-axis respectively such that gate material forms surround around x-y plane has thickness merges form row select x-axis while maintaining length Ls between individual lines. improves capacity TFTs.
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