LDMOS transistor structure using a drain ring with a checkerboard pattern for improved hot carrier reliability
作者： Douglas Brisbin , Andrew Strachan
DOI:
关键词: Checkerboard pattern 、 LDMOS 、 Hot carrier reliability 、 Transistor 、 Electrical contacts 、 Materials science 、 Ring (chemistry) 、 Drain-induced barrier lowering 、 Electrical engineering 、 Optoelectronics
摘要: An LDMOS array includes an of alternating source regions and drain formed in a semiconductor substrate to define checkerboard pattern regions. A contact is electrical with each the connect parallel. ring around periphery contact, providing redistribution current flow within thereby allowing safer hot carrier operation at higher biases than conventional layout.
lens.org 参考文章(1)
Helmuth R. Litfin, James C. Moyer, Martin J. Alter, Diamond shaped gate mesh for cellular MOS transistor array ,(1994)