LDMOS power transistor array structure and realization method of layout of LDMOS power transistor array structure

摘要: The invention discloses an LDMOS power transistor array structure comprising multiple transistors which are identical in and connected parallel. adjacent by sharing a source electrode or drain electrode. electrodes substrate lead-out ends of all the parallel via metal wires, wires. end each is arranged adopting X-shaped cross mode. outmost periphery provided with single so that protective ring formed led out external side also isolating other devices isolated. realization method layout structure. Reliability can be enhanced (e.g. HIC service life enhanced, safety working range enlarged, etc.) without changing technology.