Lock sensor circuit and method for phase lock loop circuits

作者： Ray A. Mentzer , Duane G. Quiet

DOI:

关键词: Phase-locked loop 、 Record locking 、 Control theory 、 Electronic circuit 、 Signal 、 Voltage-controlled oscillator 、 NAND logic 、 Physics 、 Detector 、 Logic gate

摘要: A lock sensor circuit detects and indicates occurrence of a phase condition an output signal loop (PLL) when the PLL is locked to reference signal. frequency detector (PFD) has input (REF IN) feedback (VCO FBK coupled circuit. The PFD delivers UP DOWN signals according whether leads or lags multi-bit up/down counter (FIG. 2 ) inputs respective outputs m bit (Q0, Q1, . Q10). (50) monitors nth (QN) where n