A Josephson technology system level experiment
作者： A.A. Bright , P. Geldermans , T.R. Gheewala , K.R. Grebe , H.C. Jones
关键词: Critical path method 、 Jump 、 Magnetic flux 、 Engineering 、 Path (graph theory) 、 Power (physics) 、 Instruction cycle 、 Sequence 、 Electronic circuit 、 Electrical engineering
摘要: This letter describes the first system level test vehicle in Josephson technology. The experiment consists of four circuit chips assembled on two cards a high density, 3-dimensional, card-on-board package. A data path, which is representative critical path future prototype processor, was successfully operated with minimum cycle time 3.7ns. simulates jump control sequence and cache access each machine cycle. incorporates essential components logic, power package portions technology prototype.
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sci-hub.se 参考文章(16)
H. C. Jones, D. J. Herrell, The Characteristics of Chip-to-Chip Signal Propagation in a Package Suitable for Superconducting Circuits IBM Journal of Research and Development. ,vol. 24, pp. 172- 177 ,(1980) , 10.1147/RD.242.0172
T. R. Gheewala, Design of 2.5-Micrometer Josephson Current Injection Logic (CIL) IBM Journal of Research and Development. ,vol. 24, pp. 130- 142 ,(1980) , 10.1147/RD.242.0130
J. H. Greiner, C. J. Kircher, S. P. Klepner, S. K. Lahiri, A. J. Warnecke, S. Basavaiah, E. T. Yen, John M. Baker, P. R. Brosious, H.-C. W. Huang, M. Murakami, I. Ames, Fabrication Process for Josephson Integrated Circuits IBM Journal of Research and Development. ,vol. 24, pp. 195- 205 ,(1980) , 10.1147/RD.242.0195
S. M. Faris, W. H. Henkels, E. A. Valsamakis, H. H. Zappe, Basic Design of a Josephson Technology Cache Memory IBM Journal of Research and Development. ,vol. 24, pp. 143- 154 ,(1980) , 10.1147/RD.242.0143
H-C.W. Huang, S. Basavaiah, C.J. Kircher, E.P. Harris, M. Murakami, S.P. Klepner, J.H. Greiner, High-reliability Pb-alloy Josephson junctions for integrated circuits IEEE Transactions on Electron Devices. ,vol. 27, pp. 1979- 1987 ,(1980) , 10.1109/T-ED.1980.20135
Juri Matisoo, The Superconducting Computer Scientific American. ,vol. 242, pp. 50- 65 ,(1980) , 10.1038/SCIENTIFICAMERICAN0580-50
P. Arnett, D. Herrell, Regulated AC power for Josephson interferometer latching logic circuits IEEE Transactions on Magnetics. ,vol. 15, pp. 554- 557 ,(1979) , 10.1109/TMAG.1979.1060124
C. Y. Ting, K. Grebe, D. Waldman, Controlled Collapse Reflow for Josephson Chip Bonding Journal of The Electrochemical Society. ,vol. 129, pp. 859- 864 ,(1982) , 10.1149/1.2123988
P.C. Arnett, D.J. Herrell, Power Design for Gigabit Josephson Logic Systems IEEE Transactions on Microwave Theory and Techniques. ,vol. 28, pp. 500- 508 ,(1980) , 10.1109/TMTT.1980.1130108
W. Anacker, Computers: Computing at 4 degrees Kelvin: Superconducting technology and unconventional packaging herald an era of ultrafast, ultrareliable computers IEEE Spectrum. ,vol. 16, pp. 26- 37 ,(1979) , 10.1109/MSPEC.1979.6368006