Method of manufacturing a contact structure of an interconnection layer for a semiconductor device and a multilayer interconnection SRAM
作者： Osamu Sakamoto
DOI:
关键词: Interconnection 、 Silicon 、 Optoelectronics 、 Semiconductor device 、 Conductivity 、 Materials science 、 Silicide 、 p–n junction 、 Spark plug 、 Electronic engineering 、 Layer (electronics)
摘要: A silicon layer in a lower and an interconnection arranged upper are electrically connected through opening for contact. plug having the same conductivity type as that of is embedded opening. The by etch back method after deposited using CVD method. has different from layer. refractory metal silicide formed between prevents pn junction being
lens.org 参考文章(22)
Tak H. Ning, Siegfried K. Wiedmann, Interconnection of opposite conductivity type semiconductor regions ,(1987)
Monte Manning, Roger Lee, Method of fabricating vertically integrated oxygen-implanted polysilicon resistor ,(1992)
Richard D. Sivan, Integrated circuit memory device and structural layout thereof ,(1991)
Hugo W. K. Chan, Robin W. Cheung, Plugged poly silicon resistor load for static random access memory cells ,(1986)
Sven E. Wahlstrom, Multilevel integrated circuits employing fused oxide layers ,(1986)
K. Tsutsumi, Y. Inoue, S. Murakami, O. Sakamoto, M. Ashida, Y. Kohno, A High-Performance Sram Memory Cell with Ldd-Tft Loads symposium on vlsi technology. pp. 23- 24 ,(1991) , 10.1109/VLSIT.1991.705971
Tat C. Choi, Richard K. Klein, Craig S. Sander, Four-transistor (4T) static ram cells ,(1987)
Shuichi Ohya, Masanori Kikuchi, Yoshitaka Narita, A New CMOS SRAM Cell with Fully Planarizing Technology symposium on vlsi technology. pp. 103- 104 ,(1987)
Jeffrey E. Brighton, Ronald E. McMann, Manuel L. Torreno, Michael T. Welch, Evaristo Garcia, Method for planarization of a semiconductor device prior to metallization ,(1987)
Charles R. Spinner, Method of making polycrystalline silicon resistors for integrated circuits ,(1990)