System level interconnect power modeling
作者： Y. Zhang , R.Y. Chen , W. Ye , M.J. Irwin
关键词: Signal processing 、 Computer science 、 Interconnection 、 Integrated circuit design 、 Computer architecture 、 Power (physics) 、 Microcontroller 、 Digital signal processing 、 Chip 、 Reduced instruction set computing 、 Embedded system
摘要: While power consumption of interconnects has become an important issue as technology scales, very few papers on modeling are available in the literature. This paper presents architectural level interconnect method and applies it to a commercial chip that integrates 16-bit DSP 32-bit RISC microcontroller. is applicable any architecture if description provided. An simulator based been enhanced generate activity parameters for several signal processing benchmarks some simple synthetic at different feature sizes. The measurements all six global buses reported.
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