Automated circuit design system and method for reducing critical path delay times
作者： Arnold Ginetti
DOI:
关键词: Netlist 、 Critical path method 、 Circuit extraction 、 Path (graph theory) 、 Process (computing) 、 Circuit design 、 Computer science 、 Signal 、 Electronic engineering 、 Node (circuits)
摘要: A computer aided design system automatically modifies a specified circuit netlist to reduce signal delays on critical paths. path that does not meet timing constraints is identified by computing slack values for each node, where negative indicate failure meeting requirements. Critical gates along the are candidates duplication determining which have fanout greater than one and can be represented library cells compatible with next tree path. One such gate selected duplicated, copy of duplicated output being used generate only other drive all fanouts gate. This generates modified netlist. Then compared those previous version If been improved, adopted as current any node in has value, modification procedure repeated until either no slack, or process unable further improve
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