Process for high density split-gate memory cell for flash or EPROM
作者： Gary Hong
DOI:
关键词: Optoelectronics 、 Silicon 、 Gate oxide 、 Substrate (electronics) 、 Electronic engineering 、 Gate dielectric 、 Dopant 、 Dielectric 、 Materials science 、 EPROM 、 Layer (electronics)
摘要: A method and structure for manufacturing a high-density split gate memory cell, flash or EPROM, is described. Silicon islands are formed from silicon substrate implanted with first conductivity-imparting dopant. dielectric layer surrounds the vertical surfaces of islands, whereby oxide. conductive over portion layer, acts as floating high density split-gate cell. source region located in substrate, second opposite dopant to dopant, base islands. drain top also side gate, an interpoly dielectric. that remaining not covered by control gate.
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