4-2 Compressor Design with New XOR-XNOR Module
作者： Sanjeev Kumar , Manoj Kumar
DOI: 10.1109/ACCT.2014.36
关键词: Transistor 、 Integrated circuit 、 CMOS 、 Power–delay product 、 Electronic engineering 、 Voltage 、 Logic synthesis 、 Asynchronous circuit 、 Computer science 、 Adiabatic circuit 、 Multiplier (economics) 、 Low-power electronics 、 XNOR gate 、 Computer hardware 、 Electronic circuit 、 Adder 、 Exclusive or
摘要: In this paper, a low-power high speed 4-2 compressor circuit is proposed for fast digital arithmetic integrated circuits. The has been widely employed multiplier realizations. Based on new exclusive OR (XOR) and NOR (XNOR) module, designed. Proposed shows power consumption variation in the range of 718.72 pW to 3357.40 pW. Maximum output delay presents 43.83 ps 27.74 ps. Further, power-delay product (PDP) varying from 315.01×10-22(J) 931.34×10-22(J) with change supply voltage 1.8V 3.3V. Power consumption, PDP have compared earlier reported circuits proven minimum lowest delay. Simulations performed by using SPICE based TSMC 0.18μm CMOS technology.
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