作者: M. F. P. O'Boyle , R. W. Ford , A. P. Nisbet
关键词: Memory ordering 、 Distributed memory 、 Memory management 、 Memory model 、 SPMD 、 Distributed shared memory 、 Extended memory 、 Execution model 、 Data diffusion machine 、 Cache coherence 、 Uniform memory access 、 Shared memory 、 Memory footprint 、 Computer science 、 Interleaved memory 、 Parallel computing 、 Compiler 、 Overlay 、 Memory map 、 Virtual memory
摘要: This paper presents new compiler analysis for the elimination of invalidation traffic in virtual shared memory, using a hybrid distributed coherence scheme. The and acknowledgement messages are removed; this reduces both network latency write fault. It aggressively exploits SPMD execution model uses array section to accurately determine only those instances when is necessary, thus avoiding additional read misses previous schemes. Equations determining precisely what data should be invalidated presented translated into form amenable analysis. Preliminary experimental results on 30 node prototype architecture demonstrate performance attainable