作者: Masayuki Yamashita , Masamitsu Shimasaki , Koreaki Fujita
DOI:
关键词: Semiconductor memory 、 Sense amplifier 、 Computer science 、 Registered memory 、 Static random-access memory 、 Computer hardware 、 Embedded system 、 Redundancy (engineering) 、 Memory cell 、 Redundant array of independent memory
摘要: An SRAM disclosed herein includes 64 memory cell array blocks and a redundant block. The total of 16 columns. A defect address indicating location defective column is programmed in an programming circuit, the specific defecting I/O circuit. Although each does not include spare or row for redundancy, can be repaired by using array, so that high integration accomplished.