Test circuit for semiconductor memory and semiconductor memory device

作者: Yutaka Shimada , Yoshinori Fujiwara

DOI:

关键词: Circuit extractionEquivalent circuitElectronic engineeringDiscrete circuitSemiconductor memoryAsynchronous circuitAnalog signalSignal chainSynchronous circuitComputer science

摘要: According to the present invention, a pseudo-error signal generating circuit is provided between memory and self-test circuit. The converts an output of based on setting supply necessary verify operation has scan chain in which set, generates signal.

参考文章(5)
William H. Dittenhofer, John C. Joy, Larry D. Blair, Fault injection using boundary scan ,(1993)
Peter Pochmuller, Michael Schittenhelm, Jens Lupke, Gunnar Krause, Justus Kuhn, Wolfgang Ernst, Jochen Muller, System for testing fast synchronous digital circuits, particularly semiconductor memory chips ,(2001)