Wetting layer sidewalls to promote copper reflow into grooves
作者： Donald S. Gardner
DOI:
关键词: Void (composites) 、 Dielectric layer 、 Interconnection 、 Materials science 、 Electronic engineering 、 Wetting layer 、 Composite material 、 Layer (electronics) 、 Copper 、 Electrical conductor
摘要: A manufacturable method for forming a highly reliable electrical interconnection. An interconnection pattern is first formed in dielectric layer on semiconductor substrate as recessed regions the layer. Sidewalls containing material which wets copper are then against walls within regions. conductive primarily comprising thereafter deposited over surface and of The reflowed to fill with substantially no void formation.
google.co.uk 参考文章(9)
Gurtej S. Sandhu, Chang Yu, Trung T. Doan, Mark E. Tuttle, Conductive contact plug and a method of forming a conductive contact plug in an integrated circuit using laser planarization ,(1991)
Tsutomu Katsumata, Akinori Yokoyama, Hitoshi Nakajima, High temperature baking paste ,(1991)
Brian Mravic, Deepak Mahulikar, Surface modified copper alloys ,(1990)
Jaim Nulman, Single anneal step process for forming titanium silicide on semiconductor wafer ,(1990)
Gurtej S. Sandhu, Chang Yu, Trung T. Doan, Method for improving step coverage of a metallization layer on an integrated circuit by use of a high melting point metal as an anti-reflective coating during laser planarization ,(1990)
Masaharu Watanabe, Yoshiko Niki, Soichi Nadahara, Method of manufacturing a semiconductor device by mega-electron volt ion implantation ,(1990)
Michael Henry Nemiroff, Method of fabricating a tapered via hole in polyimide. ,(1986)
Kuo-Hua Lee, Metalization process for headless contact using deposited smoothing material ,(1984)
Sang-in Lee, Chang-soo Park, Jeong-ha Son, Method for forming a planarized composite metal layer in a semiconductor device ,(1992)