Node level vectoring synchronization
作者： Jinxiong Lu , Chin Ngek Hung , Jianping Tu , Jie Liu , Xiang Wang
DOI:
关键词: System time 、 Computer hardware 、 Synchronizing 、 Clock domain crossing 、 Clock signal 、 Real-time computing 、 Self-clocking signal 、 Digital clock manager 、 Digital subscriber line 、 Computer science 、 Synchronization
摘要: An apparatus for synchronizing a plurality of digital subscriber line access multiplexers (DSLAMs) comprising reference clock configured to generate signal, and an interface transmit the signal DSLAMs, wherein each DSLAMs is align its system with clock.
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