Single-transistor cell EEPROM array for analog or digital storage
作者： Richard T. Simko
DOI:
关键词: Fabrication 、 Voltage 、 Diffusion (business) 、 Disk array 、 Digital storage 、 Electrical engineering 、 Polarity (mutual inductance) 、 EEPROM 、 Transistor 、 Engineering
摘要: The present invention discloses methods and apparatus for implementing a single-transistor cell EEPROM array analog or digital storage. storage is made possible by continuously maintaining net negative charge on the floating gate of transistor. Furthermore, according to invention, dense layout cells sharing common diffusion region between transistors located in same row one adjacent row. This functions as source erase program modes, drain read mode. Moreover, feature allows use single level metal distributing various operating voltages transistors. Further, utilizing simple fabrication also reduces parasitic capacitances array. Array are chosen such that "program disturbance" eliminated undergoing programming. Finally, utilizes only polarity voltages.
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