A pre-correction method for improved static linearity using parallel DACs
作者： Rat Richard Hoven , van den
DOI:
关键词: Word (computer architecture) 、 Digital down converter 、 Linearity 、 Analog device 、 Converters 、 Analog multiplier 、 Computer science 、 Successive approximation ADC 、 Electronic engineering 、 Digital signal
摘要: This paper presents a new current-steering DAC architecture for flexible and improved performance. is based on fixed entities: sub-DACs. They are nominally identical operate in parallel, which results performance, delivered several modes of operation (OP). One OP mode using the sub-DACs as independent converters. Another option them together higher conversion resolution accuracy. concentrates particular mode, through distributing input digital word among parallel sub-DACs, achieves cancellation mismatch errors. technique leads to static linearity, whereas improvement depends occupied pre-processing resources. The proposed can be fully integrated on-chip, it relies 1bit ADC makes reuse already existing
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