OneNAND FLASH MEMORY AND DATA PROCESSING SYSTEM INCLUDING THE SAME
作者： Choi Young-Joon , Cho Hyun-Duk , Kim Tae-Kyun
DOI:
关键词: Interrupt 、 Block (data storage) 、 Computer hardware 、 Synchronization (computer science) 、 Flash memory 、 Data processing system 、 Signal 、 Control logic 、 Clock signal 、 Computer science
摘要: PROBLEM TO BE SOLVED: To provide a OneNAND flash memory and data processing system including the same. SOLUTION: A control logic comprises register which is configured to store an address of non-volatile core for performing read operation with respect synchronous burst block, command information. The controlled so that page selected block continuously executed, according stored information without setting again. first second buffer memories are in interpage each period transferred alternately. An interrupt signal inactivated when all memories. activated outside synchronization clock signal. COPYRIGHT: (C)2007,JPO&INPIT
lens.org 参考文章(4)
Yeong-Taek Lee, Young-Ho Lim, NAND-type flash memory device with multi-page program, multi-page read, multi-block erase operations ,(2002)
Masaru Yano, Gapless programming for a NAND type flash memory ,(2001)
Lee Jin Yub, Hwang Sang Won, NON-VOLATILE MEMORY DEVICE PERFORMING CACHE READ OPERATION, MEMORY SYSTEM INCLUDING THE SAME, AND CACHE READ METHOD ,(2005)
Noda Junichiro, NON-VOLATILE SEMICONDUCTOR MEMORY ,(2000)