Ceramic glass integrated circuit package with integral ground and power planes

摘要: A ceramic-glass integrated circuit package utilizing low temperature sealing glass and having reduced lead to capacitance. The inventive includes a cap base. base ceramic substrate, first layer of conductive material adjacent the substrate serve as ground plane, second power plane. is selectively deposited on form at least one discrete void for housing an chip, frame plurality leads embedded in electrically connected planes but physically separated therefrom. In embodiment, integral decoupling capacitors are further included substrate. Incorporation into adapts these cost packages high-speed applications.