作者: Soo-Hyoung Lee
DOI:
关键词: Synchronous circuit 、 Clock drift 、 Clock domain crossing 、 Clock gating 、 CPU multiplier 、 Computer science 、 Digital clock manager 、 Clock signal 、 Electronic engineering 、 Self-clocking signal
摘要: A multi-phase clock signal generator provides multiple signals from an input signal, the being inverted one another and having substantially same delay duty cycle characteristics. Methods of generating are also provided.