CMOS d-type flip-flop circuits

作者: Wen-Tsung Fred Tang , Paul G. Schnizlein

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摘要: A CMOS D-type flip-flop circuit stage for avoiding the possibilty of feedthrough includes a non-overlapping clock generator section having true output and complement output. The master formed first transfer gate, regenerative transistor inverter gate. further slave second provides two-phase clocking both sections so as to prevent inadvertent racethrough data input successive stages.

参考文章(6)
Hideo Nunokawa, Hitoshi Takahashi, Satoru Yamaguchi, Multiplexing input circuit ,(1983)
Fuad H. Musa, Thomas H. Bennett, Michael F. Wiles, R. Gary Daniels, Data processor having single clock pin ,(1981)
Joe F. Sexton, Low power shift register latch ,(1983)
Minoru Takada, Yasoji Suzuki, Flip-flop circuit ,(1979)