High bandwidth self-timed data clocking scheme for memory bus implementation
作者： Stephen S. Pawlowski
DOI:
关键词: Electronic engineering 、 Signal 、 Memory bus 、 Data validation 、 Scheme (programming language) 、 Data request 、 High bandwidth 、 Computer science 、 Electronics 、 System time
摘要: A clocking scheme for transferring data between electronic devices. The includes sending a request signal from first device to second during system period. then sends the requested and corresponding validation device. latches into is latched by in time period that typically shorter than of clock.
lens.org 参考文章(2)
Gary M. Catlin, Jim Klovstad, Two-speed clock scheme for co-processors ,(1986)