Memory with isolatable expandable bit lines

摘要: The invention enables random read and write operations into cells in an array that contains connections from the memory include at least one field effect transistor (FET transistor) to embedded bit line segments which are selectively isolatable expandable achieve compactness of number cell per unit area. In a given segment first select is connected between access functions as path reference voltage drain FET set when turned off, wherein source second on. A said Memory also reduces diffusion isolation spacing bit-lines by using shield transistors.