作者: Andrés Vásquez Quintero , Danick Briand , Nico F de Rooij
DOI: 10.1088/0960-1317/25/4/045013
关键词: Adhesive 、 Photoresist 、 Daisy chain 、 Materials science 、 Composite material 、 Fabrication 、 Flexural strength 、 Flip chip 、 FOIL method 、 Electrical conductor
摘要: In this paper, a low temperature flip-chip integration technique for Si bare dies is demonstrated on flexible PET substrates with screen-printed circuits. The proposed based patterned blind vias in dry film photoresist (DP) filled isotropic conductive adhesive (ICA). DP material serves to define the vias, confine ICA paste (80 mu m-wide and potentially 25 vias), as an adhesion layer improve mechanical robustness of assembly, protect additional circuitry substrate. using gold-bumped daisy chain chips (DCCs), electrical resistances order hundreds milliohms, peel/shear strengths 0.7 N mm(-1) 3.2 MPa, respectively, (i.e. at 1.2 MPa bonding pressure). Finally, bending forces was optimized through flexural mechanics models by placing neutral plane DCC/DP interface. optimization performed reducing thickness from 400 37 m, resulted highly robust integrated assemblies withstanding 10 000 cycles dynamic 40 mm radius, relative changes resistance lower than 20%. addition, were compared samples anisotropic adhesives (ACAs). Besides high resolution, method compatible large area fabrication multilayer architectures foil.