Multistage autozero sensing for a multilevel non-volatile memory integrated circuit system
作者： Hieu Van Tran
DOI:
关键词: Binary search algorithm 、 Integrated circuit 、 Redundancy (engineering) 、 Byte 、 Non-volatile memory 、 Amplifier 、 Engineering 、 Electronic engineering 、 Voltage 、 Memory cell
摘要: A digital multibit non-volatile memory integrated system includes autozero multistage sensing. One stage may provide local sensing with autozero. Another global twisted bitline be used for array arrangement. Segment reference each segment. The read data cells using a current one or two step binary search. use inverse voltage mode no multilevel cell replica dynamic built-in byte redundancy. Sense amplifiers capable of sub-volt (<<1V) are described.
lens.org 参考文章(8)
Harvey J. Stiegler, Reference circuit for sense amplifier ,(1996)
Yong-Seok Seo, Heung-Soo Im, Sensing amplifier with current mirror ,(1997)
Hiroto Nakai, Kazuhisa Kanazawa, Shigeru Kumagai, Isao Sato, Hiroshi Iwahashi, Semiconductor memory device with address transition actuated dummy cell ,(1991)
Vernon George McKenny, Circuit and method for reading a memory cell ,(1998)
Shigeki Tomishima, Dynamic random access memory having an internal circuit using a boosted potential ,(1996)
Kiyokazu Hashimoto, Semiconductor memory device having improved data output circuit ,(1985)
Kiyokazu Hashimoto, ROM type semiconductor memory device with large operating margin ,(1996)