A Novel Architecture of Arithmetic Coder in JPEG2000 Based on Parallel Symbol Encoding
作者： G. Pastuszak
关键词: Computer science 、 VHDL 、 Context (language use) 、 JPEG 2000 、 Arithmetic 、 Parallel computing 、 Context-adaptive binary arithmetic coding 、 Cycles per instruction 、 Encoding (memory) 、 Field-programmable gate array 、 Binary number
摘要: This paper presents a high-performance architecture of the context adaptive binary arithmetic coder (CABAC) for embedded block-coding algorithm in JPEG 2000. The has been developed two variants to code or three context-symbol pairs per clock cycle. inverse multiple branch selection (IMBS) method is proposed minimize critical paths, which originate from causally dependent operations. designs have implemented VHDL and synthesized FPGA devices. Simulation results show that two- three-symbol engines can process about 22 million samples at 77 53 MHz working frequency, respectively.
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