Test interconnect for semiconductor components having bumped and planar contacts
作者： Warren M. Farnworth , Salman Akram
DOI:
关键词: Layer (electronics) 、 Wafer 、 Optoelectronics 、 Interconnection 、 Electrical conductor 、 Conductive polymer 、 Substrate (printing) 、 Electronic engineering 、 Materials science 、 Planar 、 Die (integrated circuit)
摘要: An interconnect for testing semiconductor components having both bumped contacts, and planar is provided. The includes: a substrate, first contacts on the substrate electrically engaging second contacts. In illustrative embodiments include recesses in covered with conductive layer, or formed compliant layer polymer donuts sized shaped to retain etched pillars penetrating projections, bumps particles, flat topped projections thereon. can be used construct die level test carrier singulated form, wafer panel form.
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