作者: Koichi Ishimi
DOI:
关键词: External Bus Interface 、 System bus 、 Local bus 、 Back-side bus 、 Computer hardware 、 Embedded system 、 Bus network 、 Control bus 、 Peripheral bus 、 Address bus 、 Computer science
摘要: The present invention intends to provide a high-performance multi-processor device in which independent buses and external bus interfaces are provided for each group of processors different architectures, if single chip includes plurality groups. A the comprises including first second groups architectures such as CPUs, SIMD type super-parallel processors, DSPs, is CPU processor coupled, an internal peripheral bus, interface over semiconductor chip.