Address translation logic which permits a monolithic memory to utilize defective storage cells

摘要: In the production of monolithic memory chips used in computer storage devices a certain percentage is rejected as containing one or more defective bit cells on chip. These almost perfect are arranged card so that all cards particular product identical to those sections cells. The valid logically contiguous address locations by translation logic which converts before it presented cards. Addresses re-ordered such addresses that, untranslated, would have selected area chip, after being translated select non-defective