Modeling the transient response of channel-substrate interface traps to gate voltage steps in GaAs FETs

作者: N. Sengouga , B.K. Jones

DOI: 10.1016/0038-1101(93)90145-G

关键词: Pulse (physics)OptoelectronicsTransient (oscillation)Buffer (optical fiber)Electrical engineeringFermi levelCommunication channelSubstrate (electronics)Transient responseTrap (computing)Materials science

摘要: Abstract The transient response of a hole trap, located in the substrate (buffer) side channel-substrate interface GaAs FETs, to pulse applied gate is accurately modelled. modelled found be non-exponential and excellent agreement with experimental data. similarity between filling emptying rates traps explained terms very close position Fermi level (buffer), where trap located, that level.

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