作者: N. Sengouga , B.K. Jones
DOI: 10.1016/0038-1101(93)90145-G
关键词: Pulse (physics) 、 Optoelectronics 、 Transient (oscillation) 、 Buffer (optical fiber) 、 Electrical engineering 、 Fermi level 、 Communication channel 、 Substrate (electronics) 、 Transient response 、 Trap (computing) 、 Materials science
摘要: Abstract The transient response of a hole trap, located in the substrate (buffer) side channel-substrate interface GaAs FETs, to pulse applied gate is accurately modelled. modelled found be non-exponential and excellent agreement with experimental data. similarity between filling emptying rates traps explained terms very close position Fermi level (buffer), where trap located, that level.