A High-Performance Solid-State Disk with Double-Data-Rate NAND Flash Memory.

摘要: We propose a novel solid-state disk (SSD) architecture that utilizes double-data-rate synchronous NAND flash interface for improving read and write performance. Unlike the conventional design, data transfer rate in proposed design is doubled harmony with signaling. The new does not require any extra pins respect to architecture, thereby guaranteeing backward compatibility. For performance evaluation, we simulated various SSD designs adopt measured their terms of read/write bandwidths energy consumption. Both cell types, namely single-level cells (SLCs) multi-level (MLCs), were considered. In experiments using SLC-type chips, speeds 1.65-2.76 times 1.09-2.45 faster than those respectively. Similar improvements observed MLC-based architectures tested. It was particularly effective combine way-interleaving technique multiplexes channel between controller each chip. reasonably high degree way interleaving, consumption our approach notably better design.