作者: Kenji Toyonaga , Akihiro Yanai , Yoshihito Higashitsutsumi , Toru Akiyama
DOI:
关键词: Set (abstract data type) 、 Reset (computing) 、 Terminal (electronics) 、 Algorithm 、 Signal 、 Control theory 、 Mathematics 、 Noise (signal processing) 、 Modulo 、 Binary data 、 Binary form
摘要: A noise elimination circuit for eliminating signals from data given by a binary form includes modulo in up/down counter having first input receiving data, second clock pulses and output producing counted signal. The is effected to count up response the when HIGH, down said LOW. decoder provided which has inputs signal, an indication signal corresponds predetermined number i, j, i equal or greater than zero, j n j. flip-flop reset terminal connected of decoder, set with being eliminated.