作者: Ashwini Nanda , Maged M. Michael , Douglas J. Joseph
DOI:
关键词: CPU cache 、 Controller (computing) 、 Multiprocessing 、 Protocol (object-oriented programming) 、 Associative property 、 Cache coherence 、 Buffer (optical fiber) 、 Computer network 、 Parallel computing 、 Directory 、 Computer science
摘要: For a cache-coherent controller for multiprocessor system sharing cache memory, split pending buffer having two components: fully-associative part and an indexed that can easily be made multi-ported. The associative part, PBA, include multiple entries valid bit address fields, the PBC, includes including all other status fields (i.e., content of entries). multi-ported enables one request or more responses to handled concurrently. Handling requires lookup possible directory lookup, read PBC (in case collision), after processing in protocol handling unit, PBA update, depending upon coherence implemented. response no read,