作者: Woong-Lim Choi , Kyeong-Man Ra
DOI:
关键词: Non-volatile memory 、 Materials science 、 Optoelectronics 、 EEPROM 、 Etching (microfabrication) 、 Electrical engineering 、 Quantum tunnelling 、 Conductivity 、 Dielectric 、 Substrate (electronics) 、 Gate oxide
摘要: Non volatile memory production involves: (a) forming a gate insulation layer (32) on first conductivity type semiconductor substrate (30); (b) spaced parallel floating lines (33a) the (32); (c) sidewall pieces sides of each line (33a); (d) several buried second impurity regions (36) in and between (e) dielectric film (37) surfaces; (f) forming, (37), spaced-apart control (38) cap layers (39) extending at right angles to (g) (39); (h) selectively etching using (40) as masks obtain gates (33b); (i) tunnelling (41) (j) programming (42) same direction (36). Also claimed is similar process which matrix arrangement field oxide (31) formed prior above step (a).