Low-Power Design Techniques and Test Implications
作者： Kaushik Roy , Swarup Bhunia
DOI: 10.1007/978-1-4419-0928-2_7
关键词: Leakage power 、 Test (assessment) 、 Power (physics) 、 Dissipation 、 Memory circuits 、 Adaptation (computer science) 、 Reliability engineering 、 Reduction (complexity) 、 Computer science
摘要: This chapter provides a brief overview of the prevalent design techniques for dynamic and leakage power reduction in both logic memory circuits. It also an introduction to specification format, which allows circuit properties with respect dissipation consistent manner. Next, it discusses impact existing low-power on test. Finally, covers test implications post-silicon adaptation approaches reduction.
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springerlink.com参考文章(58)
Ravishankar Kuppuswamy, Rehan Sheikh, Derek Feltham, Full Hold-Scan Systems in Microprocessors: Cost/Benefit Analysis ,(2004)
Jan M. Rabaey, Massoud Pedram, Low Power Design Methodologies ,(2009)
Kaushik Roy, Sharat Prasad, Low power CMOS VLSI circuit design ,(2000)
P. Girard, C. Landrault, S. Pravossoudovitch, D. Severac, Reducing power consumption during test application by test vector ordering international symposium on circuits and systems. ,vol. 2, pp. 296- 299 ,(1998) , 10.1109/ISCAS.1998.706917
Kiat-Seng Yeo, Kaushik Roy, Low Voltage, Low Power VLSI Subsystems ,(2004)
A. Srivastava, D. Sylvester, A general framework for probabilistic low-power design space exploration considering process variation international conference on computer aided design. pp. 808- 813 ,(2004) , 10.1109/ICCAD.2004.1382686
M. Bushnell, Vishwani Agrawal, Essentials of Electronic Testing for Digital, Memory and Mixed-Signal VLSI Circuits ,(2013)
R.C. Tekumalla, P.R. Menon, Delay testing with clock control: an alternative to enhanced scan international test conference. pp. 454- 462 ,(1997) , 10.1109/TEST.1997.639651
N.Z. Basturkmen, S.M. Reddy, I. Pomeranz, A low power pseudo-random BIST technique international on-line testing symposium. pp. 140- 144 ,(2002) , 10.1109/OLT.2002.1030197
S. DasGupta, R.G. Walther, T.W. Williams, E.B. Eichelberger, AN ENHANCEMENT TO LSSD AND SOME APPLICATIONS OF LSSD IN RELIABILITY, AVAILABILITY, AND SERVICEABILIT ieee international symposium on fault tolerant computing. pp. 289- 289 ,(1995) , 10.1109/FTCSH.1995.532648