A simulator using transputers for evaluation of multilayered protocols

作者: Tadao Saito , Hitoshi Aida , Hirofumi Fujita , Zokaei Saadan

DOI: 10.1002/ECJA.4410780803

关键词: Bit error rateComputer architecture simulatorEmbedded systemTransputerComputer scienceProtocol (science)SimulationComputer Networks and CommunicationsElectrical and Electronic Engineering

摘要: Because of the trend toward high-speed data communication, various protocols have been proposed. behaviors those are complex and therefore studies made on performance evaluations. authors studying theories evaluations for cases where bit error rate is negligible. However, it was difficult to evaluate not negligible yet low enough use. To cases, a protocol simulator which uses transputer network nodes links. In this paper, configuration implementation explained in detail result simulation discussed briefly.

参考文章(5)
Inmos Limited, OCCAM 2 reference manual Prentice Hall International. ,(1988)
E.T. Saulnier, R.J. Mitchell, Impact of implementation on XTP throughput performance international conference on communications. pp. 976- 980 ,(1992) , 10.1109/ICC.1992.268067
M. Zitterbart, High-speed transport components IEEE Network. ,vol. 5, pp. 54- 60 ,(1991) , 10.1109/65.67860
B.W. Meister, A performance study of the ISO transport protocol IEEE Transactions on Computers. ,vol. 40, pp. 253- 262 ,(1991) , 10.1109/12.76402
D.D. Clark, V. Jacobson, J. Romkey, H. Salwen, An analysis of TCP processing overhead IEEE Communications Magazine. ,vol. 40, pp. 94- 101 ,(1989) , 10.1109/MCOM.2002.1006979