作者: D. Shamiryan , M. Baklanov , M. Claes , W. Boullart , V. Paraschiv
DOI: 10.1080/00986440903155428
关键词: Dielectric 、 High-κ dielectric 、 Integrated circuit 、 Materials science 、 Nanotechnology 、 Plasma etching 、 Substrate (electronics) 、 Engineering physics 、 Dry etching 、 Reactive-ion etching
摘要: Continuous downscaling of integrated circuits brought an end to the era SiO2. In gate dielectrics, it is being replaced by materials with high dielectric constant, so-called high-k dielectrics. One challenges in integration material removal those selectively over substrate. This work one first attempts review current state art removal. Two main approaches are discussed: dry (plasma) and wet First, fundamentals limitations both presented, then overview existing experimental data given. It concluded that best results could be obtained combining approaches.